Cloud Giants Unveil Unified Co-Packaged Optics Standard For 51.2T Switch Era
Amazon Web Services, Microsoft, and Google today released a joint technical specification for 51.2 Tbps Ethernet switches that integrate co-packaged optics, and simultaneously committed to pre-ordering two years of production capacity from leading chip and optics suppliers.
The new spec, published under the Open Compute Project, describes a common mechanical, electrical, and thermal interface for co-packaged optical engines that sit beside switch ASICs, rather than in traditional pluggable modules at the front panel. It targets 51.2T switch silicon built on 3 nm and 4 nm processes and defines line cards that support 128 ports of 400G or 64 ports of 800G per chassis, with a roadmap to 1.6T.
People familiar with the agreements said the three hyperscalers have signed framework deals with Broadcom, Marvell, and Cisco’s Silicon One division for co-packaged switch ASICs, as well as with Coherent, Lumentum, and II-VI for optical engines. Taiwan’s ASE and Amkor, along with Jabil and Foxconn, are expected to handle advanced packaging and module assembly. The combined commitments cover more than 20 million ports of co-packaged optics over a two year horizon, and include take-or-pay elements.
The companies claim the new architecture cuts energy per bit for top-of-rack and spine links by 30 to 40 percent versus current pluggable-heavy designs, while freeing up front-panel space and simplifying thermal management. In a joint statement, the cloud providers argued that co-packaged optics are now necessary to sustain AI training and inference growth as model sizes and cluster scales rise.
“We have reached the practical limits of front-panel pluggables at 51.2T,” said a senior AWS networking executive. “Moving optics closer to the switch die allows us to keep scaling bandwidth without blowing out power budgets or rack density.”
Vendors welcomed the move, although some smaller players voiced concern about consolidation. Broadcom and Marvell have both been sampling 51.2T switch chips with on-package optics test vehicles for several quarters. Now, they effectively gain a locked-in customer base and a unified hardware target. Traditional module makers face a more complex transition, since co-packaged engines require closer integration with ASIC roadmaps and advanced packaging investment, not just optical design.
The joint spec stops short of naming a formal industry standard body, but references work in progress at the Optical Internetworking Forum and IEEE 802.3. Analysts said this may accelerate a broader ecosystem around common co-packaged designs, making it easier for second-tier cloud providers and telecom operators to adopt similar hardware in the next wave of upgrades.
For equipment makers and component suppliers, the shift to a shared hyperscaler spec cuts the number of variants they need to support but raises the execution bar. For incumbents in pluggable optics, it introduces the risk that a growing share of high-margin 800G and 1.6T modules is absorbed into tightly controlled co-packaged platforms rather than being sold as standard modules to a wide customer base.
Investors now face the question of who captures the value in this new topology: switch ASIC vendors, optics houses that make the leap into co-packaging, outsourced assemblers, or the hyperscalers themselves through tighter vertical integration.